1. Field of the Invention
The present invention relates to an driving apparatus for driving a flat display panel such as an AC drive type plasma or an electroluminescence display panel.
2. Description of the Related Art
There have been developed a flat display panel constituted by capacitive light-emitting elements such as plasma display panel (PDP) or electroluminescence diaply panel (ELP).
FIG. 1 shows a general structure of a plasma display apparatus including a PDP as such flat panel.
In FIG. 1, a PDP 10 includes row electrodes Y1 through Yn and X1 through Xn the corresponding ones of which constitute row electrode pairs each corresponding to each one of 1st to n-th rows of a single frame or screen. The PDP further includes column electrodes Z1 through Zm respectively corresponding to the 1st to m-th columns of the single frame. The column electrodes Z intersect the row electrode pairs X and Y and sandwich dielectric layers (not shown) and discharge cavities (not shown) together with the row electrode pairs X and Y so that a discharge cell is formed at each intersection between one pair (X, Y) of the row electrode pairs and one of the column electrode Z.
In this instance, it is to be understood that each of the discharge cells takes either one of two states of xe2x80x9clight-emittingxe2x80x9d and xe2x80x9cnon-light-emittingxe2x80x9d. In other words, the discharge cell can display merely two gradations of the lowest brightness (non-light-emitting state) and of the highest brightness (light-emitting state).
A drive apparatus 100 for driving the PDP 10 therefore employs the so-called sub-field method in driving the PDP 10 so as to realize an intermediate gradation of brightness in response to an input video signal.
In the sub-filed method, each picture element carried by the input video signal is converted into a video data of N bits. One field or frame of contained by the video signal is divided into N pieces of sub-fields the respective sub-fields correspond to the respective digits of one of the video data. An appropriate number of discharge times is allotted to a sub-field in accordance with a weight given to the sub-field. The respective discharge cavities are triggered so as to initiate the discharge action so as to constitute the respective sub-fields. Each picture element takes a brightness of an intermediate gradation corresponding to a sum of the respective number of discharge times each having occurred within the respective sub-fields within one field or frame.
A selective erasure address method is known as an example of the method for actually driving the PDP by using the subfield method described above.
FIG. 2 is a diagram showing timings of the application of various driving pulses which are applied to the column electrodes and row electrodes of the PDP 10 by the driver 100 in a subfield when the gray-scale drive is performed based on the selective erasure address method.
First, the driver 100 applies reset pulses RPX having a negative polarity simultaneously to the respective row electrodes X1 through Xn and applies reset pulses RPY having a positive polarity simultaneously to the respective row electrodes Y1 through Yn (simultaneous resetting step Rc).
In accordance with application of the reset pulses RPX and RPY, all of the discharge cells of PDP 10 are discharged to reset, and a predetermined amount of wall charge is uniformly formed in the respective discharge cells.
By this process, all of the discharge cells in PDP 10 are initialized to a xe2x80x9clight emitting cellxe2x80x9d state.
Next, the driver 100 converts the incoming video signal to pixel data of 8 bits, for example. The driver 100 separates respective bits of the 8 bit pixel data for each of the bit digits, to obtain pixel data bits, and generates pixel data pulses having a pulse voltage in accordance with the logical level (or value) of the corresponding bit. For example, the driver 100 generates a pixel data pulse DP which has a high voltage when logical level of the pixel data bit mentioned above is xe2x80x9c1xe2x80x9d and a low voltage (0 volt) when the logical level of the pixel data bit is xe2x80x9c0xe2x80x9d. Further, as shown in FIG. 2 the driver 100 applies to the column electrodes Z1 through Zm successively each of m groups of pixel data pulses DP11-1m, DP21-2m, DP31-3m, . . . DPn1-nm which are formed by grouping the pixel data pulses DP11-DPnm of one screen (n rows and m columns) for each of display lines (m lines). Furthermore, the driver 100 generates a scan pulse SP as shown in FIG. 2 in synchronism with an application timing of each of the respective pixel data pulse group DP and applies it successively to the row electrodes Y1 through Yn (pixel data writing process Wc). With this operation, there causes discharge (selective erasure discharge) only at the discharge cell at an intersecting portion of a xe2x80x9crowxe2x80x9d applied with the scan pulse SP and xe2x80x9ccolumnxe2x80x9d applied with the pixel data pulse having high voltage, so that wall charge which has been remaining in the discharge cell is selectively erased. With this process, the discharge cells which have been initialized to the xe2x80x9clight emitting cellxe2x80x9d state in the simultaneous resetting step mentioned above is shifted to a xe2x80x9cno light emitting cellxe2x80x9d state. Meanwhile, the selective erasure discharge is not caused in the discharge cells formed to cross the xe2x80x9crowsxe2x80x9d and xe2x80x9ccolumnsxe2x80x9d in which the pixel data pulse having low voltage is applied while the scan pulse SP is applied, and the state of being initialized at the simultaneous resetting step Rc, that is, the state of xe2x80x9clight emitting cellxe2x80x9d is maintained.
Next, the driver 100 repetitively applies sustaining pulses IPX having a positive polarity as shown in FIG. 2 to the row electrodes X1 through Xn, and repetitively applies sustaining pulses IPY having a positive polarity as shown in FIG. 2 to the row electrodes Y1 through Yn in the periods when the sustaining pulses IPX is not applied (light emission sustaining step Ic).
In this process, only the discharge cell at which wall charge is kept remaining, that is, the discharge cell brought into the xe2x80x9clight emitting cellxe2x80x9d state, carries out a discharge (sustaining discharge) each time the sustaining pulses IPX and IPY are applied alternately. That is, only the discharge cell set to the xe2x80x9clight emitting cellxe2x80x9d state in the pixel data writing step Wc mentioned above, repeats the light emission in accordance with sustaining discharge to the number of times corresponding to the weight of the respective subfield, and maintains the light emitting state. The number of times of the application of the sustaining pulses IPX and IPY is previously set in accordance with the weight of the respective subfield.
Then, the driver 100 applies an erasure pulse EP as shown in FIG. 2 to the row electrodes X1 to Xn (erasing step E). With this step, erasing discharge takes place simultaneously in all of the discharge cells, to extinguish the wall charge which has been remaining in each discharge cell.
An intermediate brightness corresponding to a video signal is obtained visually, by repeating the sequence of steps described above in a plurality of number of times in one field.
However, in the case of capacitive display panels such as a PDP and ELP, with regard to the pixel data pulses which are applied to the column electrodes in order to write the pixel data, each time the data of each row is written the charge and discharge must be executed also in other rows in which the writing of data is not performed. Furthermore, capacitive charge and discharge between neighboring column electrodes must also be performed. Therefore, a problem has been encountered that the electric consumption during the writing of pixel data is large.
An object of the present invention is therefore to provide a drive apparatus of a display panel which is able to reduce the electric power consumed during the writing of pixel data.
The drive apparatus of a display panel according to the present invention is a drive apparatus that applies pixel data pulses each having a pulse voltage corresponding to pixel data based on a video signal, to each of column electrodes of a display panel in which capacitive light emitting cells are formed at intersecting portions of a plurality of row electrodes that form the rows of the screen and a plurality of column electrodes that form the columns of the screen. The drive apparatus comprises: a power supply circuit that generates a resonation pulse power supply potential which has a resonation amplitude of which the maximum potential level assumes a predetermined first potential, and applies it on a power supply line; and a pixel data pulse generating circuit that produces said pixel data pulse on said column electrodes by connecting said column electrodes to said power supply line in accordance with said pixel data, wherein said power supply circuit is adapted to reduce said resonation amplitude when at least two pixel data which are adjoining in a column direction have the same logical level while maintaining said first potential of said resonation pulse power supply potential.